Transistor with contacted deep well region
US11011615B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Aug 9, 2019 |
| Grant date | May 18, 2021 |
| Priority date | — |
| Expiry date | Nov 25, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/519
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Various methods and devices that involve body contacted transistors are disclosed. An exemplary method comprises forming a gate on a planar surface of a semiconductor wafer. The gate covers a channel of a first conductivity type that is opposite to a second conductivity type. The method also comprises implanting a body dose of dopants on a source side of the gate using the gate to mask the body dose of dopants. The body dose of dopants spreads underneath the channel to form a deep well. The body dose of dopants has the first conductivity type. The method also comprises implanting, subsequent to implanting the body dose of dopants, a source dose of dopants on the source side of the gate to form a source. The method also comprises forming a source contact that is in contact with the deep well at the planar surface of the semiconductor wafer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.