Method, apparatus, and system for power management on a CPU die via clock request messaging protocol

US11016549B2 · kind B2 · utility

Assignee

• Intel Corporation · US

Inventors

• Poh Thiam Teoh · Bandar Baru Sungai Buloh, MY
• Mikal C. Hunsaker · Cameron Park, US
• Su Wei Lim · Klang, MY
• Gim Chong Lee · Merang, MY
• Hooi Kar Loo · Bayan Lepas, MY
• Shashitheren Kerisnan · Bukit Mertajam, MY
• Siang Lin Tan · Bukit Mertajam, MY
• Ming Chew Lee · Bayan Lepas, MY
• Ngeok Kuan Wai · Kluang, MY
• Li Len Lim · Kluang, MY

Key dates

• Filing date: Jan 12, 2018
• Grant date: May 25, 2021
• Expiry date: Sep 25, 2039

Classification

• Technology area (CPC G): Physics
• CPC primary: G06F2213/0026
• WIPO field: Computer technology
• WIPO sector: Electrical engineering

Abstract

Aspects of the embodiments are directed to systems, methods, and apparatuses for controlling power management states using a clock request message across a 3.3 volt GPIO pin. Systems can include a CPU root port to transmit to a platform controller hub (PCH) compliant with a PCIe protocol, a first clock request message, the first clock request message comprising a first bit set to assert a clock request transmit (CLKREQ TX assert) on a 3.3 volt general purpose input/output (GPIO) pin local to the PCH; detect that a connected device is entering into a power management state; and transmit, from the CPU root port, to the PCH, a second clock request message, the second clock request message comprising the first bit set to deassert the clock request transmit (CLKREQ TX deassert) and a second bit to assert a clock request protocol (CLKREQ#) on a 3.3 volt GPIO pin.