Electronic apparatus and method of managing read levels of flash memory
US11016705B2 · kind B2 · utility
3Cited by
6References
14Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 11, 2019 |
| Grant date | May 25, 2021 |
| Priority date | — |
| Expiry date | Jun 11, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/349
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An electronic apparatus including flash memory and a flash controller is provided. The flash controller is coupled to the flash memory and used to manage data access to the flash memory. The flash controller includes a timer, memory and a microcontroller coupled to the timer and the memory. The timer is used to generate clock interrupts. The memory is used to retain for a predetermined period of time a list of entries of data programmed into the flash memory. Upon each clock interrupt, the microcontroller is used to write an entry of data being programmed into the flash memory to update the list of entries.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.