Semiconductor devices, semiconductor packages, and methods of manufacturing the semiconductor devices
US11018101B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 30, 2019 |
| Grant date | May 25, 2021 |
| Priority date | — |
| Expiry date | Apr 30, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/15311
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device includes a conductive component on a substrate, a passivation layer on the substrate and including an opening that exposes at least a portion of the conductive component, and a pad structure in the opening and located on the passivation layer, the pad structure being electrically connected to the conductive component. The pad structure includes a lower conductive layer conformally extending on an inner sidewall of the opening, the lower conductive layer including a conductive barrier layer, a first seed layer, an etch stop layer, and a second seed layer that are sequentially stacked, a first pad layer on the lower conductive layer and at least partially filling the opening, and a second pad layer on the first pad layer and being in contact with a peripheral portion of the lower conductive layer located on the top surface of the passivation layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.