Ju-Il Choi
64Patents
6h-index
90Co-inventors
71Inventor score
Filing activity: Nov 6, 2006 → May 20, 2024
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US9461007B2 | Wafer-to-wafer bonding structure | Electricity | 211 | Active |
| US8575760B2 | Semiconductor devices having electrodes | Electricity | 15 | Active |
| US8513802B2 | Multi-chip package having semiconductor chips of different thicknesses from each other and related device | Electricity | 11 | Active |
| US9530706B2 | Semiconductor devices having hybrid stacking structures and methods of fabricating the same | Electricity | 9 | Active |
| US9831202B2 | Semiconductor devices with solder-based connection terminals and method of forming the same | Electricity | 7 | Active |
| US9735090B2 | Integrated circuit devices having through-silicon vias and methods of manufacturing such devices | Electricity | 7 | Active |
| US8872306B2 | Electrical interconnection structures including stress buffer layers | Electricity | 6 | Active |
| US10325869B2 | Semiconductor devices, semiconductor packages, and methods of manufacturing the semiconductor devices | Electricity | 5 | Active |
| US11676887B2 | Semiconductor package | Electricity | 5 | Active |
| US9728490B2 | Semiconductor devices and methods of manufacturing the same | Electricity | 5 | Active |
| US7875552B2 | Methods of forming integrated circuit chips having vertically extended through-substrate vias therein and chips formed thereby | Electricity | 4 | Active |
| US8088648B2 | Method of manufacturing a chip stack package | Electricity | 4 | Active |
| US7544538B2 | Method of forming semiconductor chips, the semiconductor chips so formed and chip-stack package having the same | Electricity | 3 | Active |
| US9006902B2 | Semiconductor devices having through silicon vias and methods of fabricating the same | Electricity | 3 | Active |
| US8987869B2 | Integrated circuit devices including through-silicon-vias having integral contact pads | Electricity | 3 | Active |
| US10128168B2 | Integrated circuit device including through-silicon via structure and method of manufacturing the same | Electricity | 3 | Active |
| US10049997B2 | Semiconductor device and method of fabricating the same | Electricity | 2 | Active |
| US7897511B2 | Wafer-level stack package and method of fabricating the same | Electricity | 2 | Active |
| US8629059B2 | Methods of forming integrated circuit chips having vertically extended through-substrate vias therein | Electricity | 2 | Active |
| US11742271B2 | Semiconductor package | Electricity | 2 | Active |
| US10777487B2 | Integrated circuit device including through-silicon via structure and method of manufacturing the same | Electricity | 1 | Active |
| US10763163B2 | Integrated circuit device and method of manufacturing the same | Electricity | 1 | Active |
| US9543200B2 | Methods for fabricating semiconductor devices having through electrodes | Electricity | 1 | Active |
| US10020273B2 | Semiconductor devices and methods of forming the same | Electricity | 1 | Active |
| US8039937B2 | Method of forming semiconductor chips, the semiconductor chips so formed and chip-stack package having the same | Electricity | 1 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.