Rail block context generation for block-level rail voltage drop analysis
US11022634B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 13, 2020 |
| Grant date | Jun 1, 2021 |
| Priority date | — |
| Expiry date | Apr 13, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2119/06
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A system is disclosed that includes a memory and a processor to perform operations, including analyzing rail voltage drop for a full-chip to identify an IR drop violation in a block design of the full-chip. The operations include performing a block-level rail voltage drop analysis for the block design and generating a revised block design corresponding to the block design in which the IR drop violation is identified. The operations include performing a block-level rail voltage drop analysis on the revised block design to verify that the IR drop violation is fixed and integrating the revised block design into the full-chip to replace the block design upon verifying that the IR drop violation is fixed. The operations include performing the rail voltage drop analysis for the full-chip comprising the revised block design.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.