Processor package with optimization based on package connection type
US11023247B2 · kind B2 · utility
0Cited by
7References
29Claims
0Family size
Assignee
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Key dates
| Filing date | Jun 29, 2018 |
| Grant date | Jun 1, 2021 |
| Priority date | — |
| Expiry date | Jun 29, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L23/3121
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The systems and methods disclosed herein provide an improved processor package to determine a connection type between the package and an external circuit and to optimize processor performance based on the connection type. As a non-limiting example, a processor package consistent with the present disclosure may include a central processing unit (CPU) die and a plurality of pins (including two connection detection pins) to connect the package to a motherboard. The CPU die may include connection determination logic and execution policy logic, implemented via processor code (“p-code”), as well as a more typical processor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.