Directed interrupt virtualization with blocking indicator
US11023398B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 13, 2020 |
| Grant date | Jun 1, 2021 |
| Priority date | — |
| Expiry date | Feb 13, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/154
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An interrupt signal is provided to a guest operating system. A bus attachment device receives an interrupt signal from a bus connected module with an interrupt target ID identifying a processor assigned for use by the guest operating system as a target processor for handling the interrupt signal. The bus attachment device checks whether the target processor is blocked from receiving interrupt signals using an interrupt blocking indicator provided by an interrupt table entry stored in a memory operationally connected with the bus attachment device. If the target processor unblocked, the bus attachment device forwards the interrupt signal to the target processor for handling. A translation of the interrupt target ID to a logical processor ID of the target processor is used to address the target processor directly.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.