Inventor · Gerlingen, DE

Christoph Raisch

92Patents
7h-index
100Co-inventors
75Inventor score

Filing activity: Dec 6, 2001 → Jan 8, 2024

Most-cited inventions

PatentTitleAreaCited byStatus
US7234004B2 Method, apparatus and program product for low latency I/O adapter queuing in a computer system Physics 17 Expired
US9432183B1 Encrypted data exchange between computer systems Electricity 12 Active
US10922111B2 Interrupt signaling for directed interrupt virtualization Physics 12 Active
US11016800B2 Directed interrupt virtualization with interrupt table Physics 12 Active
US7715428B2 Multicore communication processing Electricity 9 Active
US7921177B2 Method and computer system for providing remote direct memory access Electricity 8 Active
US7593413B2 Secure system and method for SAN management in a non-trusted server environment Electricity 8 Expired
US11243791B2 Directed interrupt virtualization with fallback Physics 7 Active
US11023398B2 Directed interrupt virtualization with blocking indicator Physics 6 Active
US11256538B2 Directed interrupt virtualization with interrupt table Physics 6 Active
US11249776B2 Directed interrupt virtualization with running indicator Physics 6 Active
US11314538B2 Interrupt signaling for directed interrupt virtualization Physics 6 Active
US11036661B2 Directed interrupt virtualization Physics 6 Active
US9596076B1 Encrypted data exchange between computer systems Electricity 6 Active
US11249927B2 Directed interrupt virtualization Physics 6 Active
US11138139B2 Directed interrupt for multilevel virtualization Physics 6 Active
US11269794B2 Directed interrupt for multilevel virtualization with interrupt table Physics 6 Active
US11163566B2 Handling an input/output store instruction Physics 4 Active
US11074203B2 Handling an input/output store instruction Physics 4 Active
US11068266B2 Handling an input/output store instruction Physics 4 Active
US8302109B2 Synchronization optimized queuing system Physics 4 Active
US8386659B2 Configuration adaptation layer for mapping I/O device resources Physics 4 Active
US10911491B2 Encryption with sealed keys Electricity 3 Active
US9355031B2 Techniques for mapping device addresses to physical memory addresses Physics 3 Active
US9460011B1 Memory reference estimation method and device based on improved cache Physics 3 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.