Voltage-mode bit line precharge for random-access memory cells
US11024373B2 · kind B2 · utility
0Cited by
7References
18Claims
0Family size
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Key dates
| Filing date | Oct 31, 2019 |
| Grant date | Jun 1, 2021 |
| Priority date | — |
| Expiry date | Oct 31, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2213/79
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Circuits and methods are disclosed for voltage-mode bit line precharge for random-access memory cells. A circuit includes an array of random access memory cells; a low-impedance voltage source configured to provide a precharge voltage; and a control circuit configured to precharge a bit line of one of the random access memory cells to the precharge voltage using the low-impedance voltage source prior to reading the one of the random access memory cells.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.