Methods for minimizing sidewall damage during low k etch processes
US11024513B2 · kind B2 · utility
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8Claims
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Key dates
| Filing date | Dec 29, 2017 |
| Grant date | Jun 1, 2021 |
| Priority date | — |
| Expiry date | Dec 29, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76898
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Methods for minimizing sidewall damage during low k etch processes are disclosed. The methods etch the low k layers f using the plasma activated vapor of an organofluorine compound having a formula selected from the group consisting of N≡C—R; (N@C—)—(R)—(—C≡N); Rx[-C═N(Rz)]y; and R(3-a)-N—Ha, wherein a=1-2, x=1-2, y=1-2, z=0-1, x+z=1-3, and each R independently has the formula HaFbCc with a=0-11, b=0-11, and c=0-5.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.