Integrated circuit device including field isolation layer and method of manufacturing the same

US11024631B2 · kind B2 · utility

Assignee

• SAMSUNG ELECTRONICS CO., LTD. · KR

Inventors

• Won-Cheol Jeong · Seoul, KR
• Hag-Ju Cho · Hwaseong-si, KR

Key dates

• Filing date: Jul 8, 2019
• Grant date: Jun 1, 2021
• Expiry date: Sep 4, 2039

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D30/6213

Abstract

An integrated circuit device includes a static random access memory (SRAM) array, and the SRAM array includes first to fourth active fins extending parallel to each other in a first direction, a first gate line overlapping the second to fourth active fins, a second gate line spaced apart from the first gate line in the first direction and overlapping the first to third active fins, a third gate line spaced apart from the first gate line in the first direction and overlapping the fourth active fin, a fourth gate line spaced apart from the second gate line in the first direction and overlapping the first active fin, a first field isolation layer contacting one end of the second active fin, and a second field isolation layer contacting one end of the third active fin. The first to fourth gate lines extend in a second direction intersecting the first direction.