System for generating standard cell layout having engineering change order (ECO) cells
US11030373B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 14, 2020 |
| Grant date | Jun 8, 2021 |
| Priority date | — |
| Expiry date | Feb 14, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D89/10
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system (including a processor and memory with computer program code) configured to execute a method which includes generating a layout diagram including: generating first and second active area patterns on opposite sides of (and having long axes parallel to) a first symmetry axis; generating non-overlapping first, second and third conductive patterns (having long axes perpendicular to the first symmetry axis) which overlap the first and second active area patterns; centering the first conductive pattern between the second and third conductive patterns; generating a first cut-pattern for, and which overlaps, central regions of the second and third conductive patterns; centering the first cut-pattern relative to the first symmetry axis; generating a fourth conductive pattern over an area bounded by the first cut-pattern; and expanding the fourth conductive pattern to substantially overlap a portion of the first conductive pattern and a portion of the second or third conductive patterns.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.