Apparatus and method for measuring round-trip time of test signal using programmable logic
US11031091B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | May 11, 2018 |
| Grant date | Jun 8, 2021 |
| Priority date | — |
| Expiry date | Mar 23, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/177
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An apparatus for measuring round-trip time of a test signal using a programmable logic device comprises a pattern generator generating a test signal and measuring a round-trip time of the test signal, a programmable logic device of which internal circuits are configured to transmit the test signal in a predetermined manner, and bidirectional bus lines connecting the pattern generator and the programmable logic device. The round-trip time of the test signal is measured by a time difference between a starting time at which the pattern generator outputs the test signal and an arrival time at which the test signal is fed back to the pattern generator.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.