Directed interrupt virtualization

US11036661B2 · kind B2 · utility

Assignee

• International Business Machines Corporation · US

Inventors

• Christoph Raisch · Gerlingen, DE
• Marco Kraemer · Sindelfingen, DE
• Donald W. Schmidt · Stone Ridge, US
• Bernd Nerz · Eppelheim, DE
• Frank Lehnert · Weil im Schönbuch, DE
• Peter D. Driever · Poughkeepsie, US

Key dates

• Filing date: Feb 13, 2020
• Grant date: Jun 15, 2021
• Expiry date: Feb 13, 2040

Classification

• Technology area (CPC G): Physics
• CPC primary: G06F13/28
• WIPO field: Computer technology
• WIPO sector: Electrical engineering

Abstract

An interrupt signal is provided to a guest operating system executed using one or more processors of a plurality of processors. One or more bus connected modules are operationally connected with the plurality of processors via a bus and a bus attachment device. The bus attachment device receives an interrupt signal from one of the bus connected modules with an interrupt target ID identifying one of the processors assigned for use by the guest operating system as a target processor for handling the interrupt signal. The bus attachment device translates the received interrupt target ID to a logical processor ID of the target processor using a mapping table comprised by the bus attachment device and forwards the interrupt signal to the target processor for handling. The logical processor ID of the target processor is used to address the target processor directly.