Variable resistance memory device
US11037992B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 11, 2019 |
| Grant date | Jun 15, 2021 |
| Priority date | — |
| Expiry date | Sep 11, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N70/823
Abstract
A variable resistance memory device including insulating patterns sequentially stacked on a substrate; first conductive lines between adjacent ones of the insulating patterns and spaced apart from each other in a first direction; a second conductive line between the first conductive lines and penetrating the insulating patterns in a third direction perpendicular to a top surface of the substrate; a phase-change pattern between the second conductive line and each of the first conductive lines and between the adjacent ones of the insulating patterns to cover a top surface of a first adjacent insulating pattern and a bottom surface of a second adjacent insulating pattern; and a selection element between the phase-change pattern and the second conductive line and between the adjacent ones of the insulating patterns to cover the top surface of the first adjacent insulating pattern and the bottom surface of the second adjacent insulating pattern.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.