Semiconductor package
US11043446B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 24, 2019 |
| Grant date | Jun 22, 2021 |
| Priority date | — |
| Expiry date | Oct 24, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3025
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor package includes a connection structure including a first insulating layer, a first redistribution layer disposed on the first insulating layer, and a first connection via penetrating through the first insulating layer and connected to the first redistribution layer, a semiconductor chip disposed on the connection structure, an encapsulant covering at least a portion of the semiconductor chip, a second insulating layer disposed on the encapsulant, a second redistribution layer including a signal line disposed on the encapsulant, and a heat dissipation layer disposed on the encapsulant and electrically insulated from the signal line.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.