Semiconductor device and manufacturing method thereof
US11043570B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 10, 2020 |
| Grant date | Jun 22, 2021 |
| Priority date | — |
| Expiry date | Mar 10, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/0167
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device includes a field effect transistor (FET). The FET includes a first channel, a first source and a first drain; a second channel, a second source and a second drain; and a gate structure disposed over the first and second channels. The gate structure includes a gate dielectric layer and a gate electrode layer. The first source includes a first crystal semiconductor layer and the second source includes a second crystal semiconductor layer. The first source and the second source are connected by an alloy layer made of one or more Group IV element and one or more transition metal elements. The first crystal semiconductor layer is not in direct contact with the second crystal semiconductor layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.