PCI express enhancements
US11043965B2 · kind B2 · utility
1Cited by
7References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 22, 2017 |
| Grant date | Jun 22, 2021 |
| Priority date | — |
| Expiry date | Jan 25, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2213/0026
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An identification is made that a link is to exit an active state, the link comprising a plurality of lanes. Parity information is maintained for the lanes based on data previously sent over the link, and an indication of the parity information is sent prior to the exit from the active state.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.