Double threshold controlled scheduling of memory access commands
US11048437B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 28, 2019 |
| Grant date | Jun 29, 2021 |
| Priority date | — |
| Expiry date | Feb 28, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/0483
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A processing device in a memory system provides an execution grant to a first queue of a plurality of queues, the first queue storing a first plurality of memory commands to be executed on the memory component. The processing device further determines whether a number of commands from the first queue that have been executed since the first queue received the execution grant satisfies an executed transaction threshold criterion and whether a number of pending commands in a second queue of the plurality of queues satisfies a promotion threshold criterion, the second queue storing a second plurality of memory commands to be executed on the memory component. Responsive to at least one of the executed transaction threshold criterion or the promotion threshold criterion being satisfied, the processing device provides the execution grant to the second queue.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.