High-speed broadside communications and control system
US11048552B2 · kind B2 · utility
1Cited by
1References
20Claims
0Family size
Assignee
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Key dates
| Filing date | May 29, 2019 |
| Grant date | Jun 29, 2021 |
| Priority date | — |
| Expiry date | May 29, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2209/503
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A real-time computational device includes a programmable real-time processor, a communications input port which is connected to the programmable real-time processor through a first broadside interface, and a communications output port which is connected to the programmable real-time processor through a second broadside interface. Both broadside interfaces enable 1024 bits of data to be transferred across each of the broadside interfaces in a single clock cycle of the programmable real-time processor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.