Patent · US Active

Semiconductor storage device

US11049573B2 · kind B2 · utility

2Cited by
3References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateFeb 26, 2020
Grant dateJun 29, 2021
Priority date
Expiry dateFeb 26, 2040

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG11C27/024
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A semiconductor storage device includes a first memory cell and a second memory cell which are connected to each other in series, a first word line which is connected to the first memory cell, a second word line which is connected to the second memory cell, and a control circuit. The control circuit is configured to charge a first node while applying a second voltage to the second word line and a first voltage to the first word line, to charge a second node on the basis of a voltage of the charged first node, to discharge the second node while applying the second voltage to the second word line and a third voltage to the first word line, and to read data from the first memory cell on the basis of voltages of the charged and discharged second node.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.