Semiconductor device and methods of manufacturing thereof
US11049767B2 · kind B2 · utility
1Cited by
2References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 26, 2019 |
| Grant date | Jun 29, 2021 |
| Priority date | — |
| Expiry date | Sep 26, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2223/5446
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In a method of manufacturing a semiconductor device, a first interlayer dielectric (ILD) layer is formed over a substrate, a chemical mechanical polishing (CMP) stop layer is formed over the first ILD layer, a trench is formed by patterning the CMP stop layer and the first ILD layer, a metal layer is formed over the CMP stop layer and in the trench, a sacrificial layer is formed over the metal layer, a CMP operation is performed on the sacrificial layer and the metal layer to remove a portion of the metal layer over the CMP stop layer, and a remaining portion of the sacrificial layer over the trench is removed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.