Memory module and memory system including the memory module
US11054992B2 · kind B2 · utility
3Cited by
3References
16Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 11, 2019 |
| Grant date | Jul 6, 2021 |
| Priority date | — |
| Expiry date | Feb 11, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/10
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory system may include a controller; and a plurality of memory modules, wherein a data input and output of the plurality of memory modules is performed with a single channel manner according to an address signal provided from the controller in common, wherein each of the plurality of memory modules includes a buffer chip and a plurality of memory chips coupled to the buffer chip, wherein all the buffer chips of the plurality of memory modules are directly coupled to the controller through independent input and output bus.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.