Non-volatile memory with selectable hard write
US11056160B2 · kind B2 · utility
0Cited by
5References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 22, 2019 |
| Grant date | Jul 6, 2021 |
| Priority date | — |
| Expiry date | Oct 22, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2213/82
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
As disclosed herein, a non-volatile memory circuit includes an array of memory cells. The non-volatile memory circuit also includes circuitry for performing a hard write to selective bits of addressed cells simultaneously with a normal write to the other bits of the addressed cells during a write operation to the addressed cells.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.