Jon S. Choy
71Patents
9h-index
34Co-inventors
78Inventor score
Filing activity: Dec 10, 2002 → Dec 13, 2023
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US8737137B1 | Flash memory with bias voltage for word line/row driver | Physics | 92 | Active |
| US7348829B2 | Slew rate control of a charge pump | Electricity | 32 | Expired |
| US7649782B2 | Non-volatile memory having a dynamically adjustable soft program verify voltage level and method therefor | Physics | 26 | Active |
| US7279959B1 | Charge pump system with reduced ripple and method therefor | Electricity | 16 | Expired |
| US9640256B1 | Nonvolatile static random access memory (NVSRAM) system having a static random access memory (SRAM) array and a resistive memory array | Physics | 15 | Active |
| US7542351B2 | Integrated circuit featuring a non-volatile memory with charge/discharge ramp rate control and method therefor | Physics | 14 | Active |
| US7580288B2 | Multi-level voltage adjustment | Physics | 11 | Active |
| US7733126B1 | Negative voltage generation | Electricity | 10 | Active |
| US7151695B2 | Integrated circuit having a non-volatile memory with discharge rate control and method therefor | Physics | 9 | Expired |
| US8830776B1 | Negative charge pump regulation | Electricity | 9 | Active |
| US7428172B2 | Concurrent programming and program verification of floating gate transistor | Physics | 7 | Active |
| US10861524B1 | Magnetoresistive random access memory (MRAM) with OTP cells | Electricity | 7 | Active |
| US7369450B2 | Nonvolatile memory having latching sense amplifier and method of operation | Physics | 7 | Expired |
| US11049539B1 | Magnetoresistive random access memory (MRAM) with OTP cells | Physics | 6 | Active |
| US7795951B2 | High-dynamic range low ripple voltage multiplier | Electricity | 6 | Active |
| US7272053B2 | Integrated circuit having a non-volatile memory with discharge rate control and method therefor | Physics | 6 | Expired |
| US6853586B2 | Non-volatile memory architecture and method thereof | Physics | 6 | Expired |
| US10295572B1 | Voltage sampling switch | Electricity | 5 | Active |
| US10224088B1 | Memory with a global reference circuit | Physics | 5 | Active |
| US10796741B1 | Non-volatile memory with a select gate regulator circuit | Physics | 5 | Active |
| US7471582B2 | Memory circuit using a reference for sensing | Physics | 5 | Active |
| US9621033B2 | Charge pump circuit for providing multiplied voltage | Electricity | 4 | Active |
| US9191007B1 | Latching level shifter and method of operation | Electricity | 4 | Active |
| US9449703B1 | Systems and methods for driving a control gate with a select gate signal in a split-gate nonvolatile memory cell | Physics | 4 | Active |
| US9985016B2 | Charge pump circuit for providing multiplied voltage | Electricity | 4 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.