Monotonic counters in memories
US11056192B2 · kind B2 · utility
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26Claims
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Key dates
| Filing date | Dec 21, 2018 |
| Grant date | Jul 6, 2021 |
| Priority date | — |
| Expiry date | Dec 21, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/5628
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An apparatus, such as a memory (e.g., a NAND memory), can have a controller, a volatile counter coupled to the controller, and a non-volatile memory array coupled to the controller. The controller can be configured to write information, other than a count of the counter, in the array each time the count of the counter has been incremented by a particular number of increments. Counts can be monotonic, non-volatile, and power-loss tolerant.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.