Process for producing adjacent chips comprising LED wires and device obtained by the process
US11063177B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Dec 20, 2013 |
| Grant date | Jul 13, 2021 |
| Priority date | — |
| Expiry date | Dec 20, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10H20/032
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
A process for producing at least two adjacent regions, each comprising an array of light-emitting wires connected together in a given region by a transparent conductive layer, comprises: producing, on a substrate, a plurality of individual zones for growing wires extending over an area greater than the cumulative area of the two chips; growing wires in the individual growth zones; removing wires from at least one zone forming an initial free area to define the arrays of wires, the initial free area comprising individual growth zones level with the removed wires; and depositing a transparent conductive layer on each array of wires to electrically connect the wires of a given array of wires, each conductive layer being separated from the conductive layer of the neighbouring region by a free area. A device obtained using the process of the invention is also provided.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.