Electronic apparatus having package base substrate
US11064603B2 · kind B2 · utility
0Cited by
13References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 8, 2019 |
| Grant date | Jul 13, 2021 |
| Priority date | — |
| Expiry date | May 3, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2201/10189
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Provided is an electronic apparatus capable of improving time margin. The electronic apparatus includes: a base substrate including a substrate base including a plurality of layers and a plurality of wiring layers between the layers; a controller chip and at least one memory semiconductor chip mounted on the base substrate; a signal line disposed in one of the wiring layers and connecting the controller chip to the at least one memory semiconductor chip; and a pair of open stubs disposed in another wiring layer, connected to both ends of the signal line, and extending to face each other with a gap.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.