Patent · US Active

Handling an input/output store instruction

US11068266B2 · kind B2 · utility

4Cited by

18References

20Claims

0Family size

Assignee

International Business Machines Corporation · US

Inventors

Christoph Raisch · Gerlingen, DE
Marco Kraemer · Sindelfingen, DE
Frank Lehnert · Weil im Schönbuch, DE
Matthias Klein · Poughkeepsie, US
Jonathan D. Bradbury · Poughkeepsie, US
Christian Jacobi · West Park, US
Brenton F. Belmar · New Paltz, US
Peter D. Driever · Poughkeepsie, US

Key dates

Filing date	Jan 29, 2020
Grant date	Jul 20, 2021
Priority date	—
Expiry date	Jan 29, 2040

Classification

Technology area (CPC G)Physics
CPC primaryG06F2201/81
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

An input/output store instruction is handled. A data processing system includes a system nest coupled to at least one input/output bus by an input/output bus controller. The data processing system further includes at least a data processing unit including a core, system firmware and an asynchronous core-nest interface. The data processing unit is coupled to the system nest via an aggregation buffer. The system nest is configured to asynchronously load from and/or store data to at least one external device which is coupled to the at least one input/output bus. The data processing unit is configured to complete the input/output store instruction before an execution of the input/output store instruction in the system nest is completed. The asynchronous core-nest interface includes an input/output status array with multiple input/output status buffers. The system firmware includes a retry buffer and the core includes an analysis and retry logic.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.