Dual-precision analog memory cell and array
US11069391B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 24, 2019 |
| Grant date | Jul 20, 2021 |
| Priority date | — |
| Expiry date | Nov 24, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/0433
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Dual-precision analog memory cells and arrays are provided. In some embodiments, a memory cell, comprises a non-volatile memory element having an input terminal and at least one output terminal; and a volatile memory element having a plurality of input terminals and an output terminal, wherein the output terminal of the volatile memory element is coupled to the input terminal of the non-volatile memory element, and wherein the volatile memory element comprises: a first transistor coupled between a first supply and a common node, and a second transistor coupled between a second supply and the common node; wherein the common node is coupled to the output terminal of the volatile memory element; and wherein gates of the first and second transistors are coupled to respective ones of the plurality of input terminals of the volatile memory element.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.