Semiconductor device and nonvolatile memory
US11069617B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jan 9, 2019 |
| Grant date | Jul 20, 2021 |
| Priority date | — |
| Expiry date | Feb 2, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B20/60
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
According to one embodiment, a semiconductor device includes a transistor having a diffusion layer extending along a surface of a substrate and a gate electrode arranged above the diffusion layer; and contacts having elongated bottom surfaces connected to the diffusion layer on both sides of the gate electrode, in which the contacts are arranged so that the bottom surfaces of the contacts are not aligned in a straight line with an extension direction of the diffusion layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.