Three-dimensional semiconductor memory device
US11069698B2 · kind B2 · utility
3Cited by
4References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 30, 2019 |
| Grant date | Jul 20, 2021 |
| Priority date | — |
| Expiry date | Apr 30, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/31116
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A three-dimensional semiconductor memory device may include a first stack block including first stacks arranged in a first direction on a substrate, a second stack block including second stacks arranged in the first direction on the substrate, and a separation structure provided on the substrate between the first stack block and the second stack block. The separation structure may include first mold layers and second mold layers, which are stacked in a vertical direction perpendicular to a top surface of the substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.