Memory system, memory controller and operating method of memory controller
US11079967B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Nov 6, 2019 |
| Grant date | Aug 3, 2021 |
| Priority date | — |
| Expiry date | Jan 31, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/7203
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory system includes a memory device including memory blocks and a memory controller configured to control the memory device. The memory device stores a firmware which includes binaries, and the binaries include a first binary and a second binary. The memory controller loads the firmware to a first region in a working memory, loads the first binary to a second region which is included in the first region, and loads the second binary to a third region which is included in the first region and is different from the second region. The memory controller stores information on an entry function corresponding to a target function included in the second binary, in a fourth region which is different from the first region. A start address of the second region is determined as a fixed value, and a start address of the third region is dynamically determined.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.