Backside contact of a semiconductor device
US11081559B1 · kind B1 · utility
9Cited by
1References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 31, 2020 |
| Grant date | Aug 3, 2021 |
| Priority date | — |
| Expiry date | Jan 31, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/6219
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
Certain aspects of the present disclosure generally relate to a semiconductor device having a backside gate contact. An example semiconductor device generally includes a transistor disposed above a substrate, wherein the transistor comprises a gate region, a channel region, a source region, and a drain region and wherein the gate region is disposed adjacent to the channel region. The semiconductor device further includes a backside gate contact that is electrically coupled to a bottom surface of the gate region and that extends below a bottom surface of the substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.