High voltage (HV) metal oxide semiconductor field effect transistor (MOSFET) in semiconductor on insulator (SOI) technology
US11081582B2 · kind B2 · utility
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8Claims
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Key dates
| Filing date | Feb 11, 2020 |
| Grant date | Aug 3, 2021 |
| Priority date | — |
| Expiry date | Feb 11, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/201
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of constructing an integrated circuit (IC) includes fabricating a metal oxide semiconductor field effect transistor (MOSFET) on a first surface of an insulator layer of the integrated circuit. The insulator layer is supported by a sacrificial substrate. The MOSFET includes an extended drain region. The method deposits a front-side dielectric layer on the MOSFET, bonds a handle substrate to the front-side dielectric layer, and then removes the sacrificial substrate. The method also fabricates multiple back gates on a second surface of the insulator layer. The second surface is opposite the first surface.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.