Hole connecting layer manufacturing method, circuit board manufacturing method and circuit board
US11083091B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Dec 29, 2017 |
| Grant date | Aug 3, 2021 |
| Priority date | — |
| Expiry date | Dec 29, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2203/061
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
Disclosed are a hole connecting layer manufacturing method, a circuit board manufacturing method and a circuit board. The hole connecting layer manufacturing method comprises: adhering a first insulating dielectric layer, used for laminating and filling, to a daughter board; laminating and solidifying the first insulating dielectric layer on the daughter board; adhering a second insulating dielectric layer, used for laminating and filling, to the first insulating dielectric layer which has been laminated and solidified; manufacturing a first receiving hole on the first insulating dielectric layer and a second receiving hole on the second insulating dielectric layer, wherein the first receiving hole and the second receiving hole are provided vertically opposite to each other; filling both the first receiving hole and the second receiving hole with a conductive medium to complete manufacturing of the hole connecting layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.