Systems and methods for implementing tile-level predication within a machine perception and dense algorithm integrated circuit
US11087067B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 6, 2021 |
| Grant date | Aug 10, 2021 |
| Priority date | — |
| Expiry date | Jan 6, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2115/10
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Systems and methods of implementing tile-level predication of a computing tile of an integrated circuit includes identifying a plurality of distinct predicate state values for each of a plurality of distinct processing cores of the computing tile; calculating one or more summed predicate state values for an entirety of the plurality of distinct processing cores based on performing a summation operation of the plurality of distinct predicate state values; propagating the one or more summed predicate state values to an instructions generating circuit of the integrated circuit; and identifying, by the instructions generating circuit, a tile-level predication for the computing tile based on input of the one or more summed predicate state values.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.