Memory apparatus and data accessing method thereof
US11088711B2 · kind B2 · utility
0Cited by
1References
16Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 8, 2019 |
| Grant date | Aug 10, 2021 |
| Priority date | — |
| Expiry date | Sep 2, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M13/19
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
The invention provides a data accessing method for a memory apparatus. The data accessing method includes: performing a reading operation on the memory apparatus based on an address information to obtain a codeword and an indicator, where the indicator corresponds to the codeword; enabling a first error correction code (ECC) operation or second ECC operation to be operated on the codeword for generating an error corrected data, wherein, the first ECC operation corrects less bits than the second ECC operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.