Branch prediction for indirect branch instructions
US11099851B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 26, 2018 |
| Grant date | Aug 24, 2021 |
| Priority date | — |
| Expiry date | Mar 10, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/323
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Examples of techniques for branch prediction for indirect branch instructions are described herein. An aspect includes detecting a first register setting instruction in an instruction pipeline of a processor, wherein the first register setting instruction stores a target instruction address in a first register of the processor. Another aspect includes looking up the first register setting instruction in a first table. Another aspect includes, based on there being a hit for the first register setting instruction in the first table, determining instruction address data corresponding to a first indirect branch instruction that is associated with the first register setting instruction in a first entry in the first table. Another aspect includes updating a branch prediction for the first indirect branch instruction in a branch prediction logic of the processor based on the target instruction address.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.