Integrated circuit including multiple-height cell and method of manufacturing the integrated circuit
US11101267B2 · kind B2 · utility
1Cited by
7References
20Claims
0Family size
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Key dates
| Filing date | Jun 18, 2019 |
| Grant date | Aug 24, 2021 |
| Priority date | — |
| Expiry date | Nov 7, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/853
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Provided is an integrated circuit including: at least one active region extending in a first row in a first direction; at least one active region extending in a second row in the first direction; and a multiple height cell including the at least one active region in the first row, the at least one active region in the second row, at least one gate line extending in a second direction crossing the first direction, wherein each of the at least one active region in the first row and the at least one active region in the second row is terminated by a diffusion break.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.