Detection of performance degradation in integrated circuits
US11105856B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 13, 2018 |
| Grant date | Aug 31, 2021 |
| Priority date | — |
| Expiry date | Feb 21, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/31915
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
Methods and systems of detecting chip degradation are described. A processor may execute a test on a device at a first time, where the test includes executable instructions for the device to execute a task under specific conditions relating to a performance attribute. The processor may receive performance data indicating a set of outcomes from the task executed by the device during the test. The processor may determine a first value of a parameter of the performance attribute based on the identified subset. The processor may compare the first value with a second value of the parameter of the performance attribute. The second value is based on an execution of the test on the device at a second time. The processor may determine a degradation status of the device based on the comparison of the first value with the second value.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.