Flexible constraint-based logic cell placement
US11106850B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 4, 2019 |
| Grant date | Aug 31, 2021 |
| Priority date | — |
| Expiry date | Sep 4, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/30
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Methods, systems and computer program products for providing flexible constraint-based logic cell placement are provided. Aspects include determining a cell placement restriction rule that specifies an offset requirement between a first type of logic cell and a second type of logic cell. Responsive to placing a first cell that is the first type of logic cell within a semiconductor layout, aspects include tagging the first cell with the cell placement restriction rule. Aspects also include placing a second cell that is the second type of logic cell at an initial position within the semiconductor layout. Responsive to determining that the initial position of the second cell violates the cell placement restriction rule, aspects include repositioning the first cell or the second cell to a modified position within the semiconductor layout such that the modified position satisfies the cell placement restriction rule.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.