Timothy A. Schell
10Patents
3h-index
28Co-inventors
60Inventor score
Filing activity: May 16, 1996 → Aug 16, 2021
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6101710A | Method for facilitating engineering changes in a multiple level circuit package | Emerging Cross-Sectional Technologies | 54 | Expired |
| US8234615B2 | Constraint programming based method for bus-aware macro-block pin placement in a hierarchical integrated circuit layout | Physics | 9 | Active |
| US5757653A | Method and apparatus for dynamically varying net rules | Physics | 6 | Expired |
| US10699050B2 | Front-end-of-line shape merging cell placement and optimization | Electricity | 2 | Active |
| US9858377B2 | Constraint-driven pin optimization for hierarchical design convergence | Physics | 2 | Active |
| US10885260B1 | Fin-based fill cell optimization | Physics | 1 | Active |
| US11106850B2 | Flexible constraint-based logic cell placement | Physics | 0 | Active |
| US11296093B2 | Deep trench capacitor distribution | Electricity | 0 | Active |
| US11055465B2 | Fill techniques for avoiding Boolean DRC failures during cell placement | Emerging Cross-Sectional Technologies | 0 | Active |
| US11775730B2 | Hierarchical large block synthesis (HLBS) filling | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.