Fill pattern to enhance e-beam process margin
US11107658B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 30, 2016 |
| Grant date | Aug 31, 2021 |
| Priority date | — |
| Expiry date | Feb 26, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01J2237/3175
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
Lithographic apparatuses suitable for complementary e-beam lithography (CEBL) are described. In an example, a method of forming a pattern for a semiconductor structure includes forming a pattern of parallel lines above a substrate. The method also includes aligning the substrate in an e-beam tool to provide the pattern of parallel lines parallel with a scan direction of the e-beam tool. The e-beam tool includes a column having a blanker aperture array (BAA) with a staggered pair of columns of openings along an array direction orthogonal to the scan direction. The method also includes forming a pattern of cuts or vias in or above the pattern of parallel lines to provide line breaks for the pattern of parallel lines by scanning the substrate along the scan direction. A cumulative current through the column has a non-zero and substantially uniform cumulative current value throughout the scanning.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.