Two-sided Majorana fermion quantum computing devices fabricated with ion implant methods
US11107966B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 11, 2019 |
| Grant date | Aug 31, 2021 |
| Priority date | — |
| Expiry date | Nov 25, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N60/128
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
A quantum computing device is fabricated by forming, on a superconductor layer, a first resist pattern defining a device region and a sensing region within the device region. The superconductor layer within the sensing region is removed, exposing a region of a first surface of an underlying semiconductor layer outside the device region. The exposed region of the semiconductor layer is implanted, forming an isolation region surrounding the device region. The sensing region and a portion of the device region of the superconductor layer are exposed. A sensing region contact is formed by coupling the first surface of the semiconductor layer with a first metal layer. A nanorod contact using the first metal within the portion of the device region outside the sensing region is formed. By depositing a second metal layer on a second surface of the semiconductor layer within the sensing region, a tunnel junction gate is formed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.