Inventor · Pleasantville, NY, US

Devendra K. Sadana

827Patents
28h-index
318Co-inventors
93Inventor score

Filing activity: Nov 26, 1980 → Sep 25, 2023

Most-cited inventions

PatentTitleAreaCited byStatus
US5767549A SOI CMOS structure Electricity 356 Expired
US6642090B1 Fin FET devices from bulk semiconductor and method for forming Electricity 351 Expired
US6958286B2 Method of preventing surface roughening during hydrogen prebake of SiGe substrates Emerging Cross-Sectional Technologies 234 Expired
US7772096B2 Formation of SOI by oxidation of silicon with engineered porosity gradient Electricity 196 Active
US6333532A Patterned SOI regions in semiconductor chips Emerging Cross-Sectional Technologies 183 Expired
US6566177B1 Silicon-on-insulator vertical array device trench capacitor DRAM Electricity 181 Expired
US6214694A Process of making densely patterned silicon-on-insulator (SOI) region on a wafer Electricity 149 Expired
US6717216B1 SOI based field effect transistor having a compressive film in undercut area under the channel and a method of making the device Electricity 148 Expired
US6432754B1 Double SOI device with recess etch and epitaxy Electricity 122 Expired
US8178430B2 N-type carrier enhancement in semiconductors Emerging Cross-Sectional Technologies 115 Active
US7087965B2 Strained silicon CMOS on hybrid crystal orientations Electricity 84 Expired
US6991998B2 Ultra-thin, high quality strained silicon-on-insulator formed by elastic strain transfer Electricity 75 Expired
US6541356B2 Ultimate SIMOX Electricity 60 Expired
US8169025B2 Strained CMOS device, circuit and method of fabrication Electricity 57 Active
US7524740B1 Localized strain relaxation for strained Si directly on insulator Electricity 55 Active
US9472588B1 Monolithic visible-infrared focal plane array on silicon Electricity 55 Active
US5930643A Defect induced buried oxide (DIBOX) for throughput SOI Electricity 52 Expired
US6180486A Process of fabricating planar and densely patterned silicon-on-insulator structure Electricity 52 Expired
US7358166B2 Relaxed, low-defect SGOI for strained Si CMOS applications Electricity 50 Expired
US8247261B2 Thin substrate fabrication using stress-induced substrate spalling Emerging Cross-Sectional Technologies 49 Active
US6426252B1 Silicon-on-insulator vertical array DRAM cell with self-aligned buried strap Electricity 49 Expired
US8912020B2 Integrating active matrix inorganic light emitting diodes for display devices Electricity 46 Active
US6177289A Lateral trench optical detectors Emerging Cross-Sectional Technologies 41 Expired
US6300218A Method for patterning a buried oxide thickness for a separation by implanted oxygen (simox) process Electricity 38 Expired
US8937299B2 III-V finFETs on silicon substrate Electricity 35 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.