Yield improving leaf cells optimization for semiconductor netlists

US11113446B2 · kind B2 · utility

Assignee

• International Business Machines Corporation · US

Inventors

• Thomas Makowski · Pfullingen, DE
• Matthias Ringe · Lörrach, DE
• Andreas H. A. Arp · Nufringen, DE
• Michael V. Koch · Ehningen, DE
• Fatih Cilek · Eppelheim, DE

Key dates

• Filing date: Jan 20, 2020
• Grant date: Sep 7, 2021
• Expiry date: Jan 20, 2040

Classification

• Technology area (CPC G): Physics
• CPC primary: G06F2119/18
• WIPO field: Computer technology
• WIPO sector: Electrical engineering

Abstract

A computer system improves a production yield of a semiconductor chip described by design data. The computer system includes a synthesis controller in signal communication with a yield optimization controller. The synthesis controller generates design data representing a design implementation of the semiconductor chip. The yield optimization controller extracts timing information from the design data. The timing information describes a slack related to a timing path within the semiconductor chip. The yield optimization controller further identifies one or more one yield improvable cells described by the design data, and determines from the design data an adverse impact of yield improvement on the slack. Based on the timing information and the determined adverse impact, the yield optimization controller calculates a subset of the yield improvable cell, and modifies the subset of the yield improvable cell so that the production yield is improved.