Systems and methods to provide write termination for one time programmable memory cells
US11114176B1 · kind B1 · utility
4Cited by
6References
30Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 6, 2020 |
| Grant date | Sep 7, 2021 |
| Priority date | — |
| Expiry date | Mar 6, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C29/027
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A One Time Programmable (OTP) memory, includes: a first driver coupled to a reference cell by a first bit line; a second driver coupled to an OTP cell by a second bit line; and a comparator having a first input coupled to the first bit line and the reference cell, a second input coupled to the second bit line and the OTP cell, and an output coupled to a logic circuit configured to control the first driver and the second driver.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.