Memory devices with redundant memory cells for replacing defective memory cells, and related systems and methods
US11114181B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 3, 2020 |
| Grant date | Sep 7, 2021 |
| Priority date | — |
| Expiry date | Aug 3, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C29/787
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Memory devices are disclosed. A memory device may include a memory array including a number of memory cells partitioned into a number of memory segments. Each of the number of memory segments may include a redundant memory-cell group configurable to be accessed instead of a defective memory-cell group of the memory segment. The memory device may also include a set of latches configurable to indicate that a redundant memory-cell group of a memory segment of the number of memory segments is to be accessed instead of a defective memory-cell group of the memory segment. The set of latches may include segment latches configurable to indicate the memory segment or a status of the set of latches. The set of latches may also include address latches configurable to indicate the defective memory-cell group within the memory segment. Related systems and methods are also disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.